Home - Hardware - ViewFinder - Technical details
The ViewFinder hardware, in overview, is not very complex (see below for schematics). It's basically a Risc PC expansion card plug, an AGP video card socket, and a beefy CPLD in between. Plus a flash ROM, and a few quite ordinary extra bits.
The bulk of the hardware design is actually inside the CPLD (Complex Programmable Logic Device). In this case a 144 pin, 256 macro cell Altera MAX 3000 series chip. It neatly interfaces the 5 V world of the Risc PC with the 3.3 V world of the AGP card. Inside the CPLD is an intricate custom hardware design of a complexity roughly equivalent to fifty ordinary logic chips. Almost all macro cells are used. Most are consumed by the AGP cycle state machine (translating Risc PC bus reads/writes to AGP bus reads/writes) and the logic performing the 'byte swaps' needed to translate the Risc PC's 'aBGR' pixel format to the AGP card's 'aRGB' one.
The hardware design was quite challenging on its own. But, to coin a phrase, well and truly a walk in the park compared to the software development.
To illustrate, the current version of the software weighs in at around 900 KB of pure ARM assembly source code. This is mostly because literally all video card software (initialisation, display programming, acceleration, etc.) had to be built from the ground up. The standard Windows drivers, or even the video card BIOS, are obviously useless under RISC OS. All there is, is rough documentation (mostly very long lists of rather superficial register descriptions) and not a shred of useful source code.
A whole lot of time was spent on developing the initialisation routines for all the supported AGP cards, roughly 20 in total. Relevant information had to be painstakingly distilled from superficial documentation, BIOS disassembly, some plain trial and error guesswork, and small hints from XFree86 source code. Only when Radeon was to be supported, and being tired of tweaking the code yet again, to support yet another AGP card, I decided to write an 80386 processor emulator, to be able to run the initialisation routines in the AGP card's BIOS directly. Although writing the emulator was hardly 'ten minutes work' (it weighs in at around 100 KB of carefully crafted assembly source code), it was well worth it in the end.
Just about an equal amount of time was spent on developing all the other, more 'useful' aspects (from an end user point of view) of the software, like display programming, graphics acceleration, RISC OS trickery, special features like dual-head, TV-out, DVI, and so on.